196d899c02
This PR adds a monolithic `CommRing` class, for internal use by `grind`, and includes instances for `Int`/`BitVec`/`IntX`/`UIntX`.
33 lines
1.1 KiB
Text
33 lines
1.1 KiB
Text
universe u
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@[match_pattern] def bit0 {α : Type u} [Add α] (a : α) : α := a + a
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@[match_pattern] def bit1 {α : Type u} [One α] [Add α] (a : α) : α := bit0 a + 1
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class AddZeroClass (M : Type u) extends Zero M, Add M where
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zero_add : ∀ a : M, 0 + a = a
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add_zero : ∀ a : M, a + 0 = a
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open AddZeroClass
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theorem bit0_zero {M} [AddZeroClass M] : bit0 (0 : M) = 0 :=
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add_zero _
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def bit (b : Bool) : Nat → Nat :=
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cond b bit1 bit0
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-- This is `Nat.bit_mod_two` from `Mathlib.Data.Nat.Bitwise`.
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-- Here it works fine:
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example (a : Bool) (x : Nat) :
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bit a x % 2 = if a then 1 else 0 := by
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simp (config := { unfoldPartialApp := true }) only [bit, bit1, bit0, ← Nat.mul_two, Bool.cond_eq_ite]
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split <;> simp [Nat.add_mod]
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-- Now prove one more theorem
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theorem bit1_zero {M} [AddZeroClass M] [One M] : bit1 (0 : M) = 1 := by rw [bit1, bit0_zero, zero_add]
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-- Now try again:
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example (a : Bool) (x : Nat) :
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bit a x % 2 = if a then 1 else 0 := by
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simp (config := { unfoldPartialApp := true }) only [bit, bit1, bit0, ← Nat.mul_two, Bool.cond_eq_ite]
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split <;> simp [Nat.add_mod] -- fails
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